1. Field of the Invention
This invention relates to a semiconductor apparatus, and more particularly to a vertical semiconductor apparatus suitable for power electronics applications.
2. Background Art
The ON resistance of a vertical power MOSFET (metal-oxide-semiconductor field effect transistor) greatly depends on the electric resistance of its conduction layer (drift layer). The dopant concentration that determines the electric resistance of the drift layer cannot exceed a maximum limit, which depends on the breakdown voltage of a pn junction between the base and the drift layer. Thus there is a tradeoff between the device breakdown voltage and the ON resistance. Improving this tradeoff is important for low power consumption devices. This tradeoff has a limit determined by the device material. Overcoming this limit is the way to realizing devices with low ON resistance beyond existing power devices.
As an example MOSFET to solve this problem, a structure with p-type pillar layers and n-type pillar layers buried in the drift layer is known as a super-junction structure. In the super-junction structure, a non-doped layer is artificially produced by equalizing the amount of charge (amount of impurities) contained in the p-type pillar layer with that contained in the n-type pillar layer. Thus, while holding a high breakdown voltage, a current is passed through the highly doped n-type pillar layer. Hence a low ON resistance beyond the material limit is realized.
Thus the super-junction structure can be used to realize an ON resistance/breakdown voltage tradeoff beyond the material limit. However, such an improved tradeoff requires formation of a thick super-junction structure having a narrow lateral pitch (pillar layers having a high aspect ratio).
Pillar layers having a high aspect ratio can be formed by forming a trench and then filling in the trench by crystal growth (e.g., IP-A 2004-273742 (Kokai)). In this method, a super-junction structure is formed by forming a plurality of periodic trenches in an n-type semiconductor layer and filling in the trenches with a p-type semiconductor layer. However, if a super-junction structure is thus formed, an identical super-junction structure is formed both in the cell section for passing a current and in the termination section located outside the cell section. To the termination section, voltage is applied both vertically and laterally. Hence electric field concentration is likely to occur therein, and the termination breakdown voltage tends to be lower than the cell breakdown voltage.
If the termination breakdown voltage is lower than the cell breakdown voltage, avalanche breakdown occurs only in the termination section upon application of high voltage. Hence a termination section having a small area cannot pass a large avalanche current, resulting in destroying the device. That is, a high avalanche withstand capability cannot be obtained. Thus, in order to obtain a high avalanche withstand capability by setting the termination breakdown voltage to be higher than the cell breakdown voltage, it is effective to form different super-junction structures in the cell section and in the termination section, or not to form a super-junction structure in the termination section.